Recently, Chaowei Semiconductor announced that it has begun mass production of the 6th generation AMD EPYC CPU codenamed “Venice”, which has become an important milestone in the 2 nm technical cooperation between AMD and TSMC. According to reports, AMD plans to launch the above mass production at TSMC's Arizona fab in the US in the future. This move demonstrates AMD's continued progress in delivering the leading-edge performance and energy efficiency needed to deliver the next generation of cloud, enterprise, and AI infrastructure. “Venice” is also the industry's first high-efficiency computing product to be mass-produced using TSMC's advanced 2 nm process technology.

Recently, Chaowei Semiconductor announced that it has begun mass production of the 6th generation AMD EPYC CPU codenamed “Venice”, which has become an important milestone in the 2 nm technical cooperation between AMD and TSMC. According to reports, AMD plans to launch the above mass production at TSMC's Arizona fab in the US in the future. This move demonstrates AMD's continued progress in delivering the leading-edge performance and energy efficiency needed to deliver the next generation of cloud, enterprise, and AI infrastructure. “Venice” is also the industry's first high-efficiency computing product to be mass-produced using TSMC's advanced 2 nm process technology.